The project aims at developing reliable predictive models to estimate long-term (i.e. > 20 kh) performance and probability of failure of SOFC stacks based on existing materials and design produced by the industrial partners. This will allow the realization of stacks with extended service intervals and reduced maintenance cost with respect to the present stack technology. The extension of service life will be supported by the introduction of Early Warning Output Signals triggered counterstrategies. The project is structured into three phases: consolidation of knowledge and refinement of models on a previously operated State of Art stack (1st Loop); enhancement of materials, design and predictive models via iterative loops (Improvement Iterative Loop); statistical validation of achieved improvements via standard and accelerated tests (Validation Process). The stack is a system of interfaces/interphases giving rise to complex phenomena that which have to be separated in single phenomena processes. The "single phenomena" are generated by the minimum of interfaces/interphases in a quasi-independent way and therefore suitable for a separate deep investigation via micro-samples studies. The improvements will be especially validated by: the application of accelerated test protocols; the evaluation of robustness of stacks and components toward load cycles and thermal cycles. The comparison with an operating not cycled stack will give the value of performance (voltage) loss for the rated stack life cycle that has to be <5% for 100 load cycles (idle to rated load) or 50 thermal cycles (room temperature to operating temperature). The outcomes will be statistically demonstrated by operating 6 stacks in standard conditions and a minimum of 3 micro-sample per interphase in standard, cycled and accelerated conditions with constant monitoring via modelling.